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 MC10H125 Quad MECL-to-TTL Translator
Description
The MC10H125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic section of digital systems. The 10H part is a functional/pinout duplication of the standard MECL 10KTM family part, with 100% improvement in propagation delay, and no increase in power-supply current. Outputs of unused translators will go to low state when their inputs are left open.
Features
http://onsemi.com MARKING DIAGRAMS*
16 MC10H125L AWLYYWW CDIP-16 L SUFFIX CASE 620A 1
* Propagation Delay, 2.5 ns Typical * Voltage Compensated * Improved Noise Margin 150 mV * MECL 10K Compatible * Pb-Free Packages are Available*
(Over Operating Voltage and Temperature Range)
16 16 1 PDIP-16 P SUFFIX CASE 648 1 MC10H125P AWLYYWWG
10H125 ALYWG
SOEIAJ-16 CASE 966 1 20
20 1 PLLC-20 FN SUFFIX CASE 775 A WL, L YY, Y WW, W G
10H125G AWLYYWW
= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
February, 2006 - Rev. 12
1
Publication Order Number: MC10H125/D
MC10H125
2 3 6 7 10 11 14 15 4 5 12 13 VBB* GND = Pin 16 VCC ( +5.0 Vdc) = Pin 9 VEE ( -5.2 Vdc) = Pin 8 1 VBB Ain Ain Aout Bout Bin Bin VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 GND Din Din Dout Cout Cin Cin VCC
*VBB to be used to supply bias to the MC10H125 only and bypassed (when used) with 0.01 mF to 0.1 mF capacitor to ground (0 V). VBB can source < 1.0 mA.
Pin assignment is for Dual-in-Line Package. For PLCC pin assignment, see the Pin Conversion Tables.
Figure 1. Logic Diagram
Figure 2. Pin Assignment
Table 1. DIP CONVERSION TABLES
16-Pin DIL to 20-Pin PLCC 16 PIN DIL 20 PIN PLCC 1 2 2 3 3 4 4 5 5 7 6 8 7 9 8 10 9 12 10 13 11 14 12 15 13 17 14 18 15 19 16 20
20-Pin DIL to 20-Pin PLCC 20 PIN DIL 20 PIN PLCC 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20
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MC10H125
Table 2. MAXIMUM RATINGS
Symbol VEE VCC VI TA Tstg Power Supply (VCC = 5.0 V) Power Supply (VEE = -5.2 V) Input Voltage (VCC = 5.0 V) Operating Temperature Range Storage Temperature Range - Plastic - Ceramic Characteristic Rating -8.0 to 0 0 to +7.0 0 to VEE 0 to +75 -55 to +150 -55 to +165 Unit Vdc Vdc Vdc C C C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
Table 3. ELECTRICAL CHARACTERISTICS (VEE = -5.2 V +5%; VCC = 5.0 V + 5.0 %) (Note 2)
0 Symbol IE Characteristic Negative Power Supply Drain Current ICCH ICCL IinH ICBO VOH VOL VIH VIL IOS VBB VCMR Positive Power Supply Drain Current Input Current Input Leakage Current High Output Voltage IOH = -1.0 mA Low Output Voltage IOL = +20 mA High Input Voltage (Note 1) Low Input Voltage (Note 1) Short Circuit Current Reference Voltage Common Mode Range (Note 3) -1.17 -1.95 60 -1.38 - -0.84 -1.48 150 -1.27 - -1.13 -1.95 60 -1.35 -0.81 -1.48 150 -1.25 -1.07 -1.95 50 -1.31 -0.735 -1.45 150 -1.19 Vdc Vdc mA Vdc V - 0.5 - 0.5 - 0.5 Vdc - - - - 2.5 63 40 225 1.5 - - - - - 2.5 63 40 145 1.0 - - - - - 2.5 63 40 145 1.0 - mA mA mA mA Vdc Min - Max 44 Min - 25 Max 40 Min - 75 Max 44 Unit mA
-2.85 to +0.3 Typical
VPP
Input Sensitivity (Note 4)
150
mV
1. When VBB is used as the reference voltage. 2. Each MECL 10HTM series circuit has been designed to meet the specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. 3. Differential input not to exceed 1.0 Vdc. 4. 150 mVp-p differential input required to obtain full logic swing on output.
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MC10H125
Table 4. AC CHARACTERISTICS
0 Symbol tpd tr tf Characteristic Propagation Delay Rise Time (Note 5) Fall Time (Note 5) Min 0.8 0.3 0.3 Max 3.3 1.2 1.2 Min 0.85 0.3 0.3 25 Max 3.35 1.2 1.2 Min 0.9 0.3 0.3 75 Max 3.4 1.2 1.2 Unit ns ns ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Output Voltage = 1.0 V to 2.0 V. RL = 500 W to GND and CL = 25 pF to GND. Refer to Figure 1.
APPLICATION
TTL RECEIVER
CHARACTERISTIC TEST
*CL includes fixture capacitance
CL*
RL
AC TEST LOAD
GND
Figure 1. TTL Output Loading Used for Device Evaluation
APPLICATION INFORMATION The MC10H125 incorporates differential inputs and Schottky TTL "totem pole" outputs. Differential inputs allow for use as an inverting/non-inverting translator or as a differential line receiver. The VBB reference voltage is available on Pin 1 for use in single-ended input biasing. The outputs of the MC10H125 go to a low-logic level whenever the inputs are left floating, and a high-logic output level is achieved with a minimum input level of 150 mVp-p. An advantage of this device is that MECL-level information can be received, via balanced twisted pair lines, in the TTL equipment. This isolates the MECL-logic from the noisy TTL environment. Power supply requirements are ground, +5.0 V and -5.2 V.
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MC10H125
ORDERING INFORMATION
Device MC10H125FN MC10H125FNG MC10H125FNR2 MC10H125FNR2G MC10H125L MC10H125M MC10H125MG MC10H125MEL MC10H125MELG MC10H125P MC10H125PG Package PLLC-20 PLLC-20 (Pb-Free) PLLC-20 PLLC-20 (Pb-Free) CDIP-16 SOEIAJ-16 SOEIAJ-16 (Pb-Free) SOEIAJ-16 SOEIAJ-16 (Pb-Free) PDIP-16 PDIP-16 (Pb-Free) Shipping 46 Units / Rail 46 Units / Rail 500 / Tape & Reel 500 / Tape & Reel 25 Unit / Rail 50 Unit / Rail 50 Unit / Rail 2000 / Tape & Reel 2000 / Tape & Reel 25 Unit / Rail 25 Unit / Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MC10H125
PACKAGE DIMENSIONS
20 LEAD PLLC CASE 775-02 ISSUE E
B -N- Y BRK D -L- -M- W D V 0.010 (0.250) T L-M N Z 0.007 (0.180) M T L-M U
S
N
S S
0.007 (0.180) M T L-M
N
S
20
1
X VIEW D-D
G1
S
S
S
A Z R
0.007 (0.180) M T L-M 0.007 (0.180) M T L-M
S
N N
S
S
S
H K1
0.007 (0.180) M T L-M
S
N
S
C
E G G1 0.010 (0.250) S T L-M 0.004 (0.100) J -T- VIEW S
S SEATING PLANE
K F VIEW S 0.007 (0.180) M T L-M
S
N
S
N
S
NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. DIMENSIONS IN INCHES. 3. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
DIM A B C E F G H J K R U V W X Y Z G1 K1
INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 --- 0.025 --- 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 --- 0.020 2_ 10 _ 0.310 0.330 0.040 ---
MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 --- 0.64 --- 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 --- 0.50 2_ 10 _ 7.88 8.38 1.02 ---
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MC10H125
PACKAGE DIMENSIONS
SOEIAJ-16 CASE 966-01 ISSUE A
16
9
LE Q1 E HE M_ L DETAIL P
1
8
Z
D A VIEW P c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.78 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.031
e
b 0.13 (0.005)
M
A1 0.10 (0.004)
CDIP-16 L SUFFIX CERAMIC DIP PACKAGE CASE 620A-01 ISSUE O
B
16
A
9
A
M L
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5 THIS DRAWING REPLACES OBSOLETE CASE OUTLINE 620-10. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 --- 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 --- 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01
16X
J
E F C K T N G
16X
0.25 (0.010)
M
TB
SEATING PLANE
D
0.25 (0.010)
M
TA
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MC10H125
PACKAGE DIMENSIONS
PDIP-16 P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R
9
-A-
16
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H K G D
16 PL
SEATING PLANE
J TA
M
M
0.25 (0.010)
M
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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MC10H125/D


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